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(R)
ICL3238E
Data Sheet July 2004 FN6012.3
15kV ESD Protected, +3V to +5.5V, 10nA, 250kbps, RS-232 Transceiver with Enhanced Automatic Powerdown
The Intersil ICL3238E contains 3.0V to 5.5V powered RS-232 transmitters/receivers which meet ElA/TIA-232 and V.28/V.24 specifications, even at VCC = 3.0V. Additionally, it provides 15kV ESD protection (IEC61000-4-2 Air Gap and Human Body Model) on transmitter outputs and receiver inputs (RS-232 pins). Targeted applications are cell phones, Palmtops, and data cables where the low operational, and even lower standby, power consumption is critical. Efficient on-chip charge pumps, coupled with manual and enhanced automatic powerdown functions, reduce the standby supply current to a 10nA trickle. Small footprint packaging, and the use of small, low value capacitors ensure board space savings as well. Data rates greater than 250kbps are guaranteed at worst case load conditions providing compatibility with popular PC communication software. The ICL3238E is a 5 driver, 3 receiver device optimized for DCE applications with full hardware handshaking. It also includes a noninverting always-active receiver for RING INDICATOR monitoring. This device, features an enhanced automatic powerdown function which powers down the on-chip power-supply and driver circuits. This occurs when all receiver and transmitter inputs detect no signal transitions for a period of 30s. The ICL3238E powers back up, automatically, whenever it senses a transition on any transmitter or receiver input. The transmitter and logic inputs include active feedback resistors that retain the input state once driven to a valid logic level. Table 1 summarizes the features of the ICL3238E, while Application Note AN9863 summarizes the features of each device comprising the ICL32XXE 3V family.
Features
* Pb-Free Available as an Option (see Ordering Info) * ESD Protection for RS-232 I/O Pins to 15kV (IEC61000) * Active Feedback Resistors on TX and Logic Inputs. * Manual and Enhanced Automatic Powerdown Features * Pin Compatible Replacement for MAX3238E, MAX3238, SP3238E * Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V * RS-232 Compatible Outputs at 2.7V Supply * Flow Through Pinout * Latch-Up Free * On-Chip Voltage Converters Require Only Four External Capacitors * Receiver and Transmitter Hysteresis For Improved Noise Immunity * Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps * Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/s * Wide Power Supply Range . . . . . . . Single +3V to +5.5V * Low Supply Current in Powerdown State. . . . . . . . . 10nA
Applications
* Any System Requiring RS-232 Communication Ports - Battery Powered, Hand-Held, and Portable Equipment - Data Cradles - Modems, Printers and other Peripherals - Cellular/Mobile Phones, Data Cables
TABLE 1. SUMMARY OF FEATURES NO. OF MONITOR Rx. (ROUTB) 1 DATA RATE (kbps) 250 MANUAL POWERDOWN? Yes ENHANCED AUTOMATIC POWERDOWN FUNCTION? Yes
PART NUMBER ICL3238E
NO. OF NO. OF Tx. Rx. 5 3
Rx. ENABLE FUNCTION? No
READY OUTPUT? No
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ICL3238E Pinout
ICL3238E (SSOP, TSSOP) TOP VIEW
C2+ GND C2VT1OUT T2OUT T3OUT R1IN R2IN 1 2 3 4 5 6 7 8 9 28 C1+ 27 V+ 26 VCC 25 C124 T1IN 23 T2IN 22 T3IN 21 R1OUT 20 R2OUT 19 T4IN 18 R3OUT 17 T5IN 16 R1OUTB 15 INVALID
Ordering Information
PART NO. ICL3238ECA ICL3238ECA-T ICL3238ECAZ (Note) ICL3238ECAZ-T (Note) ICL3238EIA ICL3238EIA-T ICL3238EIAZ (Note) ICL3238EIAZ-T (Note) ICL3238EIV-T ICL3238EIVZ-T (Note) TEMP. RANGE (oC) 0 to 70 0 to 70 0 to 70 0 to 70 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 PACKAGE 28 Ld SSOP 28 Ld SSOP Tape and Reel 28 Ld SSOP (Pb-Free) PKG. DWG. # M28.209 M28.209 M28.209
28 Ld SSOP M28.209 Tape and Reel (Pb-Free) 28 Ld SSOP 28 Ld SSOP Tape and Reel 28 Ld SSOP (Pb-Free) M28.209 M28.209 M28.209
T4OUT 10 R3IN 11 T5OUT 12 FORCEON 13 FORCEOFF 14
28 Ld SSOP M28.209 Tape and Reel (Pb-Free) 28 Ld TSSOP Tape and Reel M28.173
28 Ld TSSOP M28.173 Tape and Reel (Pb-Free)
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B.
Pin Descriptions
PIN VCC V+ VGND C1+ C1C2+ C2TIN TOUT RIN ROUT ROUTB INVALID System Power Supply Input (3.0V to 5.5V). Internally Generated Positive Transmitter Supply (+5.5V). Internally Generated Negative Transmitter Supply (-5.5V). Ground Connection. External Capacitor (Voltage Doubler) is connected to this lead. External Capacitor (Voltage Doubler) is connected to this lead. External Capacitor (Voltage Inverter) is connected to this lead. External Capacitor (Voltage Inverter) is connected to this lead. TTL/CMOS Compatible Transmitter Inputs (Note 1). 15kV ESD Protected, RS-232 Level (Nominally 5.5V) Transmitter Outputs. 15kV ESD Protected, RS-232 Compatible Receiver Inputs. TTL/CMOS Level Receiver Outputs. TTL/CMOS Level, Noninverting, Always Enabled Receiver Outputs. Active Low Output that indicates if no valid RS-232 levels are present on any receiver input. FUNCTION
FORCEOFF Active Low to Shut Down Transmitters and On-Chip Power Supply. This overrides any automatic circuitry and FORCEON (see Table 2, Note 1). FORCEON Active High Input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high, Note 1). NOTE: 1. These input pins incorporate positive feedback resistors. Once the input is driven to a valid logic level, the feedback resistor maintains that logic level until VCC is removed. Unused transmitter inputs may be left unconnected by the user.
2
ICL3238E Typical Operating Circuit
ICL3238E
C3 (OPTIONAL CONNECTION, NOTE 2) 0.1F C1 0.1F C2 0.1F 28 + 25 1 + 3 24 T1IN 23 T2IN 22 T3IN 19 T4IN 17 T5IN TTL/CMOS LOGIC LEVELS R1OUTB R1OUT R1 20 R2OUT R2 18 R3OUT R3 13 FORCEON VCC TO POWER CONTROL LOGIC 14 FORCEOFF 15 INVALID GND 2 5k 5k 11 R3IN 5k 9 R2IN RS-232 LEVELS 16 21 8 R1IN T5 12 T5OUT T4 10 T4OUT T3 7 T3OUT T2 C1+ C1C2+ C2T1 VVCC 27 V+ 4 + + C3 0.1F NOTE 3 C4 0.1F + T1OUT T2OUT RS-232 LEVELS 5 6 + 26
+3.3V
NOTE 3
NOTES: 2. The negative terminal of C3 can be connected to either VCC or GND. 3. For VCC = 3.15V (3.3V -5%), use C1 - C4 = 0.1F or greater. For VCC = 3.0V (3.3V -10%), use C1 - C4 = 0.22F.
3
ICL3238E
Absolute Maximum Ratings
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V Input Voltages TIN, FORCEOFF, FORCEON . . . . . . . . . . . . . . . . . . -0.3V to 6V RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2V ROUT, INVALID . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Information
Thermal Resistance (Typical, Note 4)
JA (oC/W)
28 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . 100 28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 110 Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (Lead Tips Only)
Operating Conditions
Temperature Range ICL3238ECX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC ICL3238EIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 4. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 3.15V to 5.5V, C1 - C4 = 0.1F; VCC = 3V, C1 - C4 = 0.22F; Unless Otherwise Specified. Typicals are at TA = 25oC TEST CONDITIONS TEMP (oC) MIN TYP MAX UNITS
PARAMETER DC CHARACTERISTICS Supply Current, Automatic Powerdown Supply Current, Powerdown Supply Current, Automatic Powerdown Disabled
All RIN Open, FORCEON = GND, FORCEOFF = VCC FORCEOFF = GND All Outputs Unloaded, FORCEON = FORCEOFF = VCC
25 25 25
-
10 10 0.3
300 300 1.0
nA nA mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS Input Logic Threshold Low TIN Active TIN, FORCEON, FORCEOFF Wake up Threshold Input Logic Threshold High TIN Active TIN, FORCEON, FORCEOFF Wake up Threshold Input Leakage Current Output Leakage Current Output Voltage Low Output Voltage High RECEIVER INPUTS Input Voltage Range Input Threshold Low VCC = 3.3V VCC = 5.0V Input Threshold High VCC = 3.3V VCC = 5.0V Input Hysteresis Input Resistance Full Full Full Full Full 25 25 -25 0.6 0.8 3 1.2 1.5 1.5 1.8 0.6 5 25 2.4 2.4 7 V V V V V V k VCC = 3.3V VCC = 5.0V VCC = 3.6V VCC = 3.3V VCC = 5.0V Full Full Full Full Full Full Full Full Full Full 2.0 2.0 2.4 0.01 0.05 0.8 0.8 0.8 1.0 10 0.4 V V V V V V A A V V
TIN, FORCEON, FORCEOFF, VIN = 0V or VCC (Note 5) FORCEOFF = GND IOUT = 1.0mA IOUT = -1.0mA
VCC -0.6 VCC -0.1
4
ICL3238E
Electrical Specifications
Test Conditions: VCC = 3.15V to 5.5V, C1 - C4 = 0.1F; VCC = 3V, C1 - C4 = 0.22F; Unless Otherwise Specified. Typicals are at TA = 25oC (Continued) TEST CONDITIONS TEMP (oC) MIN TYP MAX UNITS
PARAMETER
ENHANCED AUTOMATIC POWERDOWN (FORCEON = GND, FORCEOFF = VCC) Receiver Input Thresholds to INVALID High Receiver Input Thresholds to INVALID Low INVALID Output Voltage Low INVALID Output Voltage High Receiver Positive or Negative Threshold to INVALID High Delay (tINVH) Receiver Positive or Negative Threshold to INVALID Low Delay (tINVL) Receiver or Transmitter Edge to Transmitters Enabled Delay (tWU) Receiver or Transmitter Edge to Transmitters Disabled Delay (tAUTOPWDN) TRANSMITTER OUTPUTS Output Voltage Swing Output Resistance Output Short-Circuit Current Output Leakage Current TIMING CHARACTERISTICS Maximum Data Rate Receiver Propagation Delay RL = 3k, CL = 1000pF, One Transmitter Switching Receiver Input to Receiver Output, CL = 150pF Normal Operation Normal Operation tPHL - tPLH tPHL - tPLH VCC = 3.3V, RL = 3k to 7k, Measured From 3V to -3V or -3V to 3V CL = 150pF to 1000pF CL = 150pF to 2500pF tPHL tPLH Full 25 25 25 25 25 25 25 25 250 6 4 500 0.15 0.15 150 300 50 50 15 12 30 30 kbps s s ns ns ns ns V/s V/s VOUT = 12V, VCC = 0V or 3V to 5.5V, Automatic Powerdown or FORCEOFF = GND All Transmitter Outputs Loaded with 3k to Ground VCC = V+ = V- = 0V, Transmitter Output = 2V Full Full Full Full 5.0 300 5.4 10M 35 60 25 V mA A (Note 6) (Note 6) (Figure 6) (Figure 6) IOUT = 1.0mA IOUT = -1.0mA Full Full Full Full 25 -2.7 -0.3 VCC-0.6 0.3 2.7 0.3 0.4 V V V V s
25
-
60
-
s
25 Full
15
25 30
60
s s
Receiver Output Enable Time Receiver Output Disable Time Transmitter Skew Receiver Skew Transition Region Slew Rate
ESD PERFORMANCE RS-232 Pins (TOUT, RIN) IEC61000-4-2 Air Gap Discharge IEC61000-4-2 Contact Discharge Human Body Model All Other Pins NOTES: 5. These inputs utilize a positive feedback resistor. The input current is negligible when the input is at either supply rail. 6. An "edge" is defined as a transition through the transmitter or receiver input thresholds. Human Body Model 25 25 25 25 15 8 15 2.5 kV kV kV kV
5
ICL3238E Detailed Description
ICL3238E operates from a single +3V to +5.5V supply, guarantees a 250kbps minimum data rate, requires only four small external 0.1F (0.22F for VCC = 3.0V) capacitors, features low power consumption, and meets all EIA/TIA-232 and V.28 specifications. The circuit is divided into three sections: The charge pump, the transmitters, and the receivers. Transmitter outputs disable and assume a high impedance state when the device enters the powerdown mode (see Table 2). These outputs may be driven to 12V when disabled. All devices guarantee a 250kbps data rate for full load conditions (3k and 1000pF), VCC 3.0V, with one transmitter operating at full speed. Under more typical conditions of VCC 3.3V, RL = 3k, and CL = 250pF, one transmitter easily operates at 1Mbps. Transmitter inputs incorporate an active positive feedback resistor that maintains the last driven input state in the absence of a forcing signal. Unused transmitter inputs may be left unconnected.
Charge-Pump
Intersil's new ICL32XXE family utilizes regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate 5.5V transmitter supplies from a VCC supply as low as 3.0V. This allows these devices to maintain RS-232 compliant output levels over the 10% tolerance range of 3.3V powered systems. The efficient on-chip power supplies require only four small, external 0.1F capacitors for the voltage doubler and inverter functions at VCC = 3.3V. See the "Capacitor Selection" section, and Table 3 for capacitor recommendations for other operating conditions. The charge pumps operate discontinuously (i.e., they turn off as soon as the V+ and V- supplies are pumped up to the nominal values), resulting in significant power savings.
Receivers
The ICL3238E contains both standard inverting, three-state receivers, and a single noninverting (monitor) receiver (denoted by the ROUTB label) that is always active, regardless of the state of any control lines. Both receiver types convert RS-232 signals to CMOS output levels and accept inputs up to 25V while presenting the required 3k to 7k input impedance (see Figure 1) even if the power is off (VCC = 0V). The receivers' Schmitt trigger input stage uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions. The inverting receivers disable during forced (manual) powerdown, but not during automatic powerdown (see Table 2). Conversely, the monitor receiver remains active
Transmitters
The transmitters are proprietary, low dropout, inverting drivers that translate TTL/CMOS inputs to EIA/TIA-232 output levels. Coupled with the on-chip 5.5V supplies, these transmitters deliver true RS-232 levels over a wide range of single supply system voltages.
TABLE 2. POWERDOWN LOGIC TRUTH TABLE RCVR OR XMTR EDGE WITHIN 30 SEC? No No Yes Yes No No X X RS-232 LEVEL PRESENT AT RECEIVER INPUT? No Yes No Yes No Yes No Yes
FORCEOFF FORCEON TRANSMITTER RECEIVER INPUT INPUT OUTPUTS OUTPUTS H H H H H H L L H H L L L L X X Active Active Active Active High-Z High-Z High-Z High-Z Active Active Active Active Active Active High-Z High-Z
ROUTB OUTPUT Active Active Active Active Active Active Active Active
INVALID OUTPUT L H L H L H L H
MODE OF OPERATION Normal Operation (Enhanced Auto Powerdown Disabled) Normal Operation (Enhanced Auto Powerdown Enabled) Powerdown Due to Enhanced Auto Powerdown Logic Manual Powerdown
INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN) X X NOTE: 7. Input is connected to INVALID Output. Note 7 Note 7 Note 7 Note 7 Active High-Z Active High-Z Active Active Yes No H L Normal Operation Forced Auto Powerdown
6
ICL3238E
even during manual powerdown making it extremely useful for RING INDICATOR monitoring. Standard receivers driving powered down peripherals must be disabled to prevent current flow through the peripheral's protection diodes (see Figures 2 and 3). This renders them useless for wake up functions, but the corresponding monitor receiver can be dedicated to this task as shown in Figure 3.
VCC RXIN -25V VRIN +25V GND 5k RXOUT GND VROUT VCC
current required by 5V RS-232 devices. The already low current requirement drops significantly when the device enters powerdown mode. In powerdown, supply current drops to 10nA, because the on-chip charge pump turns off (V+ collapses to VCC, V- collapses to GND), and the transmitter outputs three-state. This micro-power mode makes this device ideal for battery powered and portable applications.
Software Controlled (Manual) Powerdown
The ICL3238E allows the user to force the IC into the low power, standby state, and utilizes a two pin approach where the FORCEON and FORCEOFF inputs determine the IC's mode. For always enabled operation, FORCEON and FORCEOFF are both strapped high. To switch between active and powerdown modes, under logic or software control, only the FORCEOFF input need be driven. The FORCEON state isn't critical, as FORCEOFF dominates over FORCEON. Nevertheless, if strictly manual control over powerdown is desired, the user must strap FORCEON high to disable the enhanced automatic powerdown circuitry. ICL3238E inverting (standard) receiver outputs also disable when the device is in manual powerdown, thereby eliminating the possible current path through a shutdown peripheral's input protection diode (see Figures 2 and 3). Connecting FORCEOFF and FORCEON together disables the enhanced automatic powerdown feature, enabling them to function as a manual SHUTDOWN input (see Figure 4).
FORCEOFF
FIGURE 1. INVERTING RECEIVER CONNECTIONS
VCC
VCC CURRENT FLOW VOUT = VCC
VCC
Rx POWERED DOWN UART Tx GND SHDN = GND OLD RS-232 CHIP
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN PERIPHERAL
VCC
PWR MGT LOGIC
FORCEON
INVALID ICL3238E
TRANSITION DETECTOR TO WAKE-UP LOGIC VCC R1OUTB RX POWERED DOWN UART VOUT = HI-Z R1OUT TX T1IN T1OUT FORCEOFF = GND R1IN ICL3238E CPU I/O UART
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN WHEN NO VALID RECEIVER SIGNALS ARE PRESENT
With any of the above control schemes, the time required to exit powerdown, and resume transmission is only 25s. When using both manual and enhanced automatic powerdown (FORCEON = 0), the ICL3238E won't power up from manual powerdown until both FORCEOFF and FORCEON are driven high, or until a transition occurs on a receiver or transmitter input. Figure 5 illustrates a circuit for ensuring that the ICL3238E powers up as soon as
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
Powerdown Functionality
This 3V RS-232 interface device requires a nominal supply current of 0.3mA during normal operation (not in powerdown mode). This is considerably less than the 5mA to 11mA
7
ICL3238E
FORCEOFF switches high. The rising edge of the Master Powerdown signal forces the device to power up, and the ICL3238E returns to enhanced automatic powerdown mode an RC time constant after this rising edge. The time constant isn't critical, because the ICL3238E remains powered up for 30 seconds after the FORCEON falling edge, even if there are no signal transitions. This gives slow-to-wake systems (e.g., a mouse) plenty of time to start transmitting, and as long as it starts transmitting within 30 seconds both systems remain enabled. RING INDICATOR signal, as long as the other receiver inputs are floating, or driven to GND (as in the case of a powered down driver).
Enhanced Automatic Powerdown
Even greater power savings is available by using this device which features an enhanced automatic powerdown function. When the enhanced powerdown logic determines that no transitions have occurred on any of the transmitter nor receiver inputs for 30 seconds, the charge pump and transmitters powerdown, thereby reducing supply current to 10nA. The ICL3238E automatically powers back up whenever it detects a transition on one of these inputs. This automatic powerdown feature provides additional system power savings without changes to the existing operating system. Enhanced automatic powerdown operates when the FORCEON input is low, and the FORCEOFF input is high. Tying FORCEON high disables automatic powerdown, but manual powerdown is always available via the overriding FORCEOFF input. Table 2 summarizes the enhanced automatic powerdown functionality.
FORCEOFF T_IN EDGE DETECT S 30s TIMER AUTOSHDN
POWER MANAGEMENT UNIT
MASTER POWERDOWN LINE 0.1F 1M
FORCEOFF
FORCEON
ICL3238E
FIGURE 5. CIRCUIT TO ENSURE IMMEDIATE POWER UP WHEN EXITING FORCED POWERDOWN
INVALID Output
The INVALID output always indicates (see Table 2) whether or not 30s have elapsed with invalid RS-232 signals (see Figures 6 and 8) persisting on all of the receiver inputs,
VALID RS-232 LEVEL - INVALID = 1 2.7V INDETERMINATE 0.3V INVALID LEVEL - INVALID = 0 -0.3V INDETERMINATE -2.7V VALID RS-232 LEVEL - INVALID = 1 FORCEON R_IN EDGE DETECT
R
FIGURE 7. ENHANCED AUTOMATIC POWERDOWN LOGIC
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS
giving the user an easy way to determine when the interface block should power down. Invalid receiver levels occur whenever the driving peripheral's outputs are shut off (powered down) or when the RS-232 interface cable is disconnected. In the case of a disconnected interface cable where all the receiver inputs are floating (but pulled to GND by the internal receiver pull down resistors), the INVALID logic detects the invalid levels and drives the output low. The power management logic then uses this indicator to power down the interface block. Reconnecting the cable restores valid levels at the receiver inputs, INVALID switches high, and the power management logic wakes up the interface block. INVALID can also be used to indicate the DTR or
Figure 7 illustrates the enhanced powerdown control logic. Note that once the ICL3238E enters powerdown (manually or automatically), the 30 second timer remains timed out (set), keeping the ICL3238E powered down until FORCEON transitions high, or until a transition occurs on a receiver or transmitter input. The INVALID output signal switches low to indicate that invalid levels have persisted on all of the receiver inputs for more than 60s (see Figure 8), but this has no direct effect on the state of the ICL3238E (see the next sections for methods of utilizing INVALID to power down the device). INVALID switches high 1s after detecting a valid RS-232 level on a receiver input. INVALID operates in all modes (forced or automatic powerdown, or forced on), so it is also useful for systems employing manual powerdown circuitry. The time to recover from automatic powerdown mode is typically 25s.
8
ICL3238E
RECEIVER INPUTS TRANSMITTER INPUTS TRANSMITTER OUTPUTS tINVH INVALID OUTPUT tINVL tAUTOPWDN V+ VCC 0 VtWU tAUTOPWDN tWU
} INVALID REGION
FIGURE 8. ENHANCED AUTOMATIC POWERDOWN, AND INVALID TIMING DIAGRAMS
Emulating Standard Automatic Powerdown
If enhanced automatic powerdown isn't desired, the user can implement the standard automatic powerdown feature (mimics the function on the ICL3221, ICL3223, ICL3243E) by connecting the INVALID output to the FORCEON and FORCEOFF inputs, as shown in Figure 9. After 60s of invalid receiver levels, INVALID switches low and drives the ICL3238E into a forced powerdown condition. INVALID switches high as soon as a receiver input senses a valid RS232 level, forcing the ICL3238E to power on. See the "INVALID DRIVING FORCEON AND FORCEOFF" section of Table 2 for an operational summary. This operational mode is perfect for handheld devices that communicate with another computer via a detachable cable. Detaching the cable allows the internal receiver pull-down resistors to pull the inputs to GND (an invalid RS-232 level), causing the 60s timer to time-out and drive the IC into powerdown. Reconnecting the cable restores valid levels, causing the IC to power back up.
FORCEON FORCEOFF INVALID
Hybrid Automatic Powerdown Options
For devices which communicate only through a detachable cable, connecting INVALID to FORCEOFF (with FORCEON = 0) may be a desirable configuration. While the cable is attached INVALID and FORCEOFF remain high, so the enhanced automatic powerdown logic powers down the RS232 device whenever there is 30 seconds of inactivity on the receiver and transmitter inputs. Detaching the cable allows the receiver inputs to drop to an invalid level (GND), so INVALID switches low and forces the RS-232 device to power down. The ICL3238E remains powered down until the cable is reconnected (INVALID = FORCEOFF = 1) and a transition occurs on a receiver or transmitter input (see Figure 7). For immediate power up when the cable is reattached, connect FORCEON to FORCEOFF through a network similar to that shown in Figure 5.
Capacitor Selection
The charge pumps require 0.1F, or greater, capacitors for 3.3V (5% tolerance) operation. For other supply voltages refer to Table 3 for capacitor values. Do not use values smaller than those listed in Table 3. Increasing the capacitor values (by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. C2, C3, and C4 can be increased without increasing C1's value, however, do not increase C1 without also increasing C2, C3, and C4 to maintain the proper ratios (C1 to the other capacitors).
TABLE 3. REQUIRED CAPACITOR VALUES VCC (V) 3.0 to 3.6 (3.3V 10%) 3.15 to 3.6 (3.3V 5%) C1 (F) 0.22 0.1 0.047 0.22 C2, C3, C4 (F) 0.22 0.1 0.33 1
ICL3238E
I/O UART CPU
FIGURE 9. CONNECTIONS FOR AUTOMATIC POWERDOWN WHEN NO VALID RECEIVER SIGNALS ARE PRESENT
4.5 to 5.5 3.0 to 5.5
9
ICL3238E
When using minimum required capacitor values, make sure that capacitor values do not degrade excessively with temperature. If in doubt, use capacitors with a larger nominal value. The capacitor's equivalent series resistance (ESR) usually rises at low temperatures and it influences the amount of ripple on V+ and V-. an RS-232 load at 250kbps. The static transmitters were also loaded with an RS-232 receiver.
VCC 0.1F
+
Power Supply Decoupling
In most circumstances a 0.1F bypass capacitor is adequate. In applications that are particularly sensitive to power supply noise, decouple VCC to ground with a capacitor of the same value as the charge-pump capacitor C1. Connect the bypass capacitor as close as possible to the IC.
+ C1
C1+ C1-
VCC
V+
+ C3
ICL3238E + C2 C2TIN ROUT FORCEON VCC FORCEOFF TOUT RIN 5k 1000pF C2+ VC4 +
Operation Down to 2.7V
ICL3238E transmitter outputs meet RS-562 levels (3.7V), at full data rate, with VCC as low as 2.7V. RS-562 levels typically ensure inter operability with RS-232 devices.
Transmitter Outputs when Exiting Powerdown
Figure 10 shows the response of two transmitter outputs when exiting powerdown mode. As they activate, the two transmitter outputs properly go to opposite RS-232 levels, with no glitching, ringing, nor undesirable transients. Each transmitter is loaded with 3k in parallel with 2500pF. Note that the transmitters enable only when the magnitude of the supplies exceed approximately 3V.
FIGURE 11. TRANSMITTER LOOPBACK TEST CIRCUIT
5V/DIV. T1IN
T1OUT
5V/DIV
FORCEOFF T1 R1OUT VCC = +3.3V C1 - C4 = 0.1F
2V/DIV
5s/DIV.
FIGURE 12. LOOPBACK TEST AT 120kbps
T2 VCC = +3.3V C1 - C4 = 0.1F TIME (20s/DIV.)
5V/DIV. T1IN
FIGURE 10. TRANSMITTER OUTPUTS WHEN EXITING POWERDOWN
T1OUT
High Data Rates
The ICL3238E maintains the RS-232 5V minimum transmitter output voltages even at high data rates. Figure 11 details a transmitter loopback test circuit, and Figure 12 illustrates the loopback test result at 120kbps. For this test, all transmitters were simultaneously driving RS-232 loads in parallel with 1000pF, at 120kbps. Figure 13 shows the loopback results for a single transmitter driving 1000pF and 10
R1OUT VCC = +3.3V C1 - C4 = 0.1F 2s/DIV.
FIGURE 13. LOOPBACK TEST AT 250kbps
ICL3238E Interconnection with 3V and 5V Logic
The ICL3238E directly interfaces with 5V CMOS and TTL logic families. Nevertheless, with the ICL32XX at 3.3V, and the logic supply at 5V, AC, HC, and CD4000 outputs can drive ICL32XX inputs, but ICL32XX outputs do not reach the minimum VIH for these logic families. See Table 4 for more information.
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS SUPPLY VOLTAGES VCC SYSTEM POWER-SUPPLY SUPPLY VOLTAGE VOLTAGE (V) (V) 3.3 5 3.3 5
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD event delivered to an IC during human handling. The tester delivers the charge through a 1.5k current limiting resistor, making the test less severe than the IEC61000 test which utilizes a 330 limiting resistor. The HBM method determines an ICs ability to withstand the ESD transients typically present during handling and manufacturing. Due to the random nature of these events, each pin is tested with respect to all other pins. The RS-232 pins on "E" family devices can withstand HBM ESD events to 15kV.
IEC61000-4-2 Testing
COMPATIBILITY Compatible with all CMOS families. Compatible with all TTL and CMOS logic families. Compatible with ACT and HCT CMOS, and with TTL. ICL32XX outputs are incompatible with AC, HC, and CD4000 CMOS inputs.
5
3.3
15kV ESD Protection
All pins on ICL32XX devices include ESD protection structures, but the ICL32XXE family incorporates advanced structures which allow the RS-232 pins (transmitter outputs and receiver inputs) to survive ESD events up to 15kV. The RS-232 pins are particularly vulnerable to ESD damage because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ESD event that might destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up, protect without allowing any latchup mechanism to activate, and don't interfere with RS-232 signals as large as 25V.
The IEC61000 test method applies to finished equipment, rather than to an individual IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (the RS-232 pins in this case), and the IC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. The lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the HBM test. The extra ESD protection built into this device's RS-232 pins allows the design of equipment meeting level 4 criteria without the need for additional board level protection on the RS-232 port. AIR-GAP DISCHARGE TEST METHOD For this test method, a charged probe tip moves toward the IC pin until the voltage arcs to it. The current waveform delivered to the IC pin depends on approach speed, humidity, temperature, etc., so it is difficult to obtain repeatable results. The "E" device RS-232 pins withstand 15kV air-gap discharges. CONTACT DISCHARGE TEST METHOD During the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. The result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages higher than 8kV. All "E" family devices survive 8kV contact discharges on the RS-232 pins.
11
ICL3238E Typical Performance Curves
6 TRANSMITTER OUTPUT VOLTAGE (V) VOUT+ 4 20 2 1 TRANSMITTER AT 250kbps OTHER TRANSMITTERS AT 30kbps 0 -2 -4 -6 VOUT -SLEW 5 0 1000 2000 3000 4000 5000 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF) LOAD CAPACITANCE (pF) SLEW RATE (V/s) -SLEW
VCC = 3.3V, TA = 25oC
25
15 +SLEW
10
FIGURE 14. TRANSMITTER OUTPUT VOLTAGE vs LOAD CAPACITANCE
FIGURE 15. SLEW RATE vs LOAD CAPACITANCE
55 50 SUPPLY CURRENT (mA) 45 40 35 30 25 20 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF) 20kbps 120kbps SUPPLY CURRENT (mA) 250kbps
3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 2.5
NO LOAD ALL OUTPUTS STATIC
3.0
3.5
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
FIGURE 16. SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA
FIGURE 17. SUPPLY CURRENT vs SUPPLY VOLTAGE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: 1235 PROCESS: Si Gate CMOS
12
ICL3238E Shrink Small Outline Plastic Packages (SSOP)
N INDEX AREA E -B1 2 3 L SEATING PLANE -AD -CA 0.25 0.010 GAUGE PLANE H 0.25(0.010) M BM
M28.209 (JEDEC MO-150-AH ISSUE B)
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 B C D MIN 0.002 0.065 0.009 0.004 0.390 0.197 MAX 0.078 0.072 0.014 0.009 0.413 0.220 MILLIMETERS MIN 0.05 1.65 0.22 0.09 9.90 5.00 MAX 2.00 1.85 0.38 0.25 10.50 5.60 NOTES 9 3 4 6 7 8o Rev. 1 3/95

A1 0.10(0.004) A2 C
E e H L N
e
B 0.25(0.010) M C AM BS
0.026 BSC 0.292 0.022 28 0o 8o 0.322 0.037
0.65 BSC 7.40 0.55 28 0o 8.20 0.95
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "B" does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of "B" dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
13
ICL3238E Thin Shrink Small Outline Plastic Packages (TSSOP)
N INDEX AREA E E1 -B1 2 3 L 0.05(0.002) -AD -CSEATING PLANE A 0.25 0.010 GAUGE PLANE 0.25(0.010) M BM
M28.173
28 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 b c MIN 0.002 0.031 0.0075 0.0035 0.378 0.169 MAX 0.047 0.006 0.051 0.0118 0.0079 0.386 0.177 MILLIMETERS MIN 0.05 0.80 0.19 0.09 9.60 4.30 MAX 1.20 0.15 1.05 0.30 0.20 9.80 4.50 NOTES 9 3 4 6 7 8o Rev. 0 6/98
A1 0.10(0.004) A2 c
D E1 e E L
e
b 0.10(0.004) M C AM BS
0.026 BSC 0.246 0.0177 28 0o 8o 0.256 0.0295
0.65 BSC 6.25 0.45 28 0o 6.50 0.75
NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AE, Issue E. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E1" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of "b" dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees)
N
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